FIG. 1 shows a typical lighting system including an electronic converter 10 and at least one lighting module 20. Generally speaking, a lighting module 20 includes one or more light radiation sources, including e.g. at least one LED (Light Emitting Diode) or other solid-state lighting means, such as e.g. laser diodes.
Specifically, in the presently considered example, the electronic converter 10 is a DC/DC electronic converter. Therefore, the electronic converter 10 includes two input terminals 102a and 102b for receiving an input voltage Vin and two output terminals 104a and 104b for the connection to the lighting module(s) 20. As known in the art, direct voltage Vin may also be obtained from an alternated voltage (provided e.g. by the mains), e.g. via a rectification circuit, e.g. a diode-bridge rectifier, and optionally a filter, such as e.g. a capacitor connected between the terminals 102a and 102b. 
Generally speaking, the electronic converter 10 may be either a voltage generator or a current generator, i.e. the electronic converter 10 supplies at output, via the positive terminal 104a and the negative terminal 104b, a regulated voltage Vout, such as e.g. 12 or 24 VDC, or a regulated current iout. The lighting module 20 includes a positive input terminal 200a and a negative input terminal 200b, for the connection to the terminals 104a and 104b of the electronic converter 10. For example the lighting module 20, such as a LED module including one or more LEDs connected between the terminals 200a and 200b, may be connected, either directly or through a cable, to the electronic converter 10. Therefore, the terminal 200a is connected to the positive terminal 104a, and the terminal 200b is connected to the negative terminal 104b, and thus the lighting module receives the regulated voltage Vout or the regulated current iout.
Generally speaking, also a plurality of lighting modules 20 may be connected to the electronic converter 10. For example, if a regulated voltage Vout is used, the lighting modules 20 may be connected in parallel to the terminals 104a and 104b. On the other hand, if a regulated current iout is used, the lighting modules 20 are typically connected in series between the terminals 104a and 104b. 
The light emitted by the light sources of the lighting module 20 is often required to be adjustable, i.e. dimmable. If the electronic converter 10 supplies a regulated current iout, the control circuit 112 may directly vary the amplitude of the regulated current iout as a function of a dimming control signal. In addition or as an alternative, the control circuit 112 may enable or disable the output of the electronic converter 10 as a function of a dimming control signal. In this solution, the converter 10 therefore performs the dimming operation, and regulates the average current flowing through the lighting module 20 by switching the converter 10, and therefore the lighting module 20, on or off. For example, the on/off switching is often driven by means of a Pulse Width Modulation (PWM), wherein a control circuit varies the duty cycle as a function of the dimming control signal. Typically, the PWM frequency is in the range between 100 Hz and 2 kHz.
Generally speaking, there are known several types of electronic converters.
For example, FIG. 2 shows a circuit diagram of an asymmetric electronic half-bridge converter 10.
In the presently considered example, the electronic converter 10 therefore includes a half-bridge, i.e. two electronic switches S1 and S2 which are connected (typically directly) in series between the two input terminals 102a/102b, wherein the switching of the electronic switches S1 and S2 is driven by a control unit 112. For example, in the present embodiment the electronic switches S1 and S2 are n-channel Field-Effect Transistors (FETs), e.g. N-MOS, i.e. n-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). The switches S1 and S2 may have respective capacitances CA1, CA2 (typically the parasitic capacitances) and respective diodes DA1, DA2 (typically the body diodes) connected in parallel thereto.
In the presently considered embodiment, converter 10 moreover includes a transformer T, including a primary winding T1 and a secondary winding T2. Specifically, transformer T may be modelled as an ideal transformer having a given turns ration 1:n, an inductance LM which represents the magnetization inductance of transformer T and an inductance LR representing the leakage inductance, which are shown in FIG. 2 on the primary side of transformer T.
In the presently considered example, the primary winding of transformer T and a capacitor CRP are connected between the intermediate point between the two electronic switches S1/S2 and the first input terminal 102a (positive terminal) or the second input terminal 102b (negative terminal representing a first ground GND1). Specifically, in the presently considered example, the first terminal of the primary winding T1 of transformer T is connected (e.g. directly) to the intermediate point between the two electronic switches S1 and S2. On the other hand, the second terminal of the primary winding T1 of transformer T is connected via a capacitor CRP to the second input terminal 102b. In addition or as an alternative, the second terminal of the primary winding T1 of transformer T may also be connected via a further capacitor CRP to the first input terminal 102b. Therefore, the switches S1 and S2 may be used for selectively connecting the first terminal of the primary winding T1 of transformer T to voltage Vin or to ground GND1, thereby controlling the current flow through the primary winding T1 of transformer T.
On the secondary side T2 of transformer T, the converter 10 includes a rectification circuit, configured to convert the alternated current (AC) provided by the secondary winding T2 into a direct current (DC), and a filter circuit which stabilizes the signal provided by the rectification circuit, so that the output voltage Vo and/or the output current io are more stable.
Specifically, in the presently considered example, the converter includes, on the secondary side of transformer T, three branches which are connected (e.g. directly) in parallel, wherein:    a) the first branch includes a first capacitor CRS connected in series to the secondary winding T2 of transformer T,    b) a second branch including a diode D, and    c) a third branch including a second capacitor Co connected in series with an inductor Lo, wherein the outputs 104a and 104b are connected in parallel with the second capacitor Co.
For example, a first terminal of the secondary winding T2 may be connected (e.g. directly) to the cathode of diode D, and the second terminal of the secondary winding T2 is connected (e.g. directly) via capacitor CRS to the anode of diode D. Moreover, a first terminal of inductor Lo may be connected (e.g. directly) to the cathode of diode D, and the second terminal of inductor Lo may be connected (e.g. directly) via capacitor Co to the anode of diode D (which therefore represents a second ground GND2). The electronic converter 10 is asymmetric because the on times of S1 and S2 are typically different, and mainly depend on the output voltage.
The converter shown in FIG. 2 offers the advantage that such a converter may be driven so as to subject switches S1 and S2 to Zero Voltage Switching (ZVS) and diode D may be subjected to Zero Current Switching (ZCS), so-called soft-switching.
Specifically, the control unit 112 is typically configured to switch switches S1 and S2 alternatively, i.e. only one of the switches S1 and S2 is closed at a given time. Generally speaking, there may also be provided intermediate intervals, during which neither switch S1 nor S2 is closed. For this reason, the control unit 112 is typically configured to drive the switches S1 and S2 of the half-bridge S1/S2 with the following stages, which are periodically repeated:
during a first time interval Δt1 switch S1 is closed and switch S2 is open;
during a second time interval Δt2 switch S1 is open and switch S2 is open;
during a third time interval Δt3 switch S1 is open and switch S2 is closed; and
during a fourth time interval Δt4 switch S1 is open and switch S2 is open.
For example, FIGS. 3c and 3d respectively show two driver signals VGS1 and VGS2 for the gate terminals of switches S1 and S2, and FIG. 3A shows the voltage VDS2 at the intermediate point between the switches S1 and S2. Specifically, when switch S1 is closed during the time interval Δt1, the voltage VDS2 is equal to voltage Vin, and when switch S2 is closed during the time interval Δt3, the voltage VDS2 is zero.
On the other hand, the ZVS condition may be achieved by properly sizing the resonant components of the converter (i.e. the inductances and the capacitances). Specifically, as previously mentioned, there are typically provided intermediate switching intervals (Δt2 and Δt4) during which neither switch, S1 or S2, is closed. During such intervals the current IP on the primary side of transformer T1 should charge and discharge the capacitances CA1 and CA2 associated to the switches S1 and S2, so that the switches S1 and S2 may be closed in the following zero voltage switching stage, i.e.:
voltage VDS2 should be zero at the end of interval Δt2, i.e. capacitance CA2 should be discharged during time interval Δt2; and
voltage VDS2 should be equal to voltage Vin at the end of interval Δt4, i.e. capacitance CA2 should be charged during time interval Δt4.
As shown in FIG. 3, specifically in FIG. 3B, the discharging of capacitance CA2 during time interval Δt2 may be easily ensured, because the current IP is positive at the end of interval Δt2. Specifically, the amplitude of the current IP depends on the duration of interval Δt1, which in turn is regulated in order to achieve a desired output voltage Vout or output current iout.
On the other hand, in order to charge capacitance CA2, current IP is required to be negative during time interval Δt4. To this end, the resonant components of the electronic converter 10, e.g. the transformer T, e.g. the magnetization inductance LM, may be sized so that the primary winding T1 of transformer T provides, during time interval Δt4, a negative current IP. In this case, the duration of time interval Δt3 should be controlled e.g. by verifying that current IP is lower than a given threshold at the end of time interval Δt3.
The energy stored in transformer T depends therefore on the operating conditions of the electronic converter 10, e.g. the energy charged during time interval Δt1 (i.e. while switch S1 is closed) and the output load. Therefore, the sizing of the inductances of the electronic converter 10 is typically carried out assuming the worst case. However, this also implies that the electronic converter 10 often operates in less than optimal conditions, which reduces the efficiency of converter 10. For example, details about the operation and the possible sizing of the circuit shown in FIG. 2 are described in document PCT/IB2014/064657, the content whereof is incorporated herein to this end.
Moreover, as explained in the foregoing, the discharge of capacitance CA2 during the time interval Δt2 may be ensured easily, because the current IP is typically high during the interval Δt1. However, this implies that the discharging time of capacitance CA2 is short, which may increase the electromagnetic interference.
For this reason, it may be necessary for a capacitor to be connected (e.g. directly) in parallel with switch S2, so as to increase the value of capacitance CA2. As a matter of fact, a high capacitance CA2 enables increasing the discharging time of capacitance CA2, i.e. reducing the value dV/dt, thus reducing the electromagnetic interference. However, this implies that the charging of capacitance CA2 during time interval Δt4 is slower, i.e. transformer T should supply a current IP with higher amplitude during time interval Δt4. As a consequence, transformer T should be adapted to manage a higher amount of energy, which raises the temperature of transformer T and further reduces the efficiency of the electronic converter 10.